1. Field of the Invention
The present invention relates to semiconductor devices encapsulated in chip size packages and manufacturing methods therefor.
This application claims priority on Japanese Patent Application No. 2006-335688, the content of which is incorporated herein by reference.
2. Description of the Related Art
Accompanied with recent improvements of electronic devices such as portable terminal devices, which are designed to realize multiple functions and highly-sophisticated functions, it is strongly demanded that semiconductor devices not only be reduced in size and dimension but also capable of performing high-speed processing. Semiconductor devices encapsulated in wafer-level chip size packages (WL-CSP) have attracted attention in recent times. In the manufacturing of semiconductor devices each encapsulated in WL-CSP, re-wirings and electrode terminals are formed at the wafer level, and ICs formed on the surface of a wafer are subjected to resin sealing (or packaging) in order to protect them from heat, light, and physical impact at the wafer level; then, the wafer is divided into individual pieces in the final stage. Thus, it is possible to make the dimensions of semiconductor devices after being packaged substantially match the dimensions of IC chips. This makes it possible to realize a remarkable downsizing of semiconductor devices.
Conventionally-known semiconductor devices each encapsulated in WL-CSP are not always designed such that only the surface of a substrate (i.e., an individual piece divided from a wafer) is sealed with a resin. For example, Japanese Unexamined Patent Application Publication No. 2000-243729 teaches a semiconductor device whose side areas are also sealed with a resin; and Japanese Unexamined Patent Application Publication No. 2001-144121 teaches a semiconductor device whose side areas and backside are also sealed with a resin. Each of the aforementioned technologies is designed to protect a substrate by sealing defects such as chipping, which occur during dicing, with a resin; hence, it is possible to reduce defects or to reduce defects in size in the semiconductor device.
However, when an intense impact occurs at the corners of the aforementioned semiconductor device, the resin coating the substrate partially chips or partially peels, and the substrate is partially exposed to the surface. For this reason, it is necessary to carefully handle them during transportation or during installation into electronic devices. That is, the aforementioned technologies suffer from disadvantages in terms of high-speed transportation and high-speed installation.